The increased integration of semiconductor chips has caused conventional wire bonding methods for packaging chips to become less preferred. Instead, wireless connection methods have been pursued to improve connection reliability and efficiency. Typical wireless connection methods include flip-chip connection methods and tape automated bonding (TAB) methods which utilize TAB tapes.
Typical TAB tapes include an electrically insulating supporting layer which may comprise polyimide and an electrically conductive layer on the supporting layer. The electrically conductive layer which may comprise copper, for example, is typically deposited onto or bonded to the supporting layer using conventional sputtering and plating techniques well known to those skilled in the art. U.S. Pat. No. 5,288,539 to Araki entitled "Tab Tape With A Peeling-Prevention Structure For the Conductive Layer", discloses a TAB tape which is a composite of a supporting layer and a conductive layer. Peeling-prevention slits are also formed in the supporting layer to inhibit peel-off of the conductive layer when the TAB tape is subject to thermally-induced stresses and other bending stresses. Such peel-off may occur when the TAB tape is thermally treated (e.g., during reflow processing) because of the substantially different coefficients of thermal expansion associated with the supporting layer and conductive layer. U.S. Pat. Nos. 5,034,591 to Fang entitled "Tape Automated Bonding Leads Having A Stiffener and A Method of Bonding With Same" and 5,656,941 to Bishop et al. entitled "Tab Tape-Based Bare Chip Test and Burn-In Carrier", also disclose wireless connection methods using TAB tapes.
Referring now to FIGS. 1-2, a conventional TAB tape includes a polyimide tape 2, a copper conductive pattern 3, a solder resist layer 6 for protecting the copper conductive pattern 3 and a bonding agent 7 for bonding the copper conductive pattern 3 to the polyimide tape 2. As illustrated best by FIG. 1, the copper conductive pattern 3 provides a plurality of electrical connections to an integrated circuit chip 1 positioned within a device hole 5. A slit hole 4 is also provided to enable mounting of the TAB tape to a printed circuit board (not shown), for example. Unfortunately, as illustrated best by FIG. 2, the layers of material which make up the TAB tape may be formed at different temperatures and/or exposed to thermal treatments when bonding the conductive pattern 3 to the chip 1, for example. Thus, like the TAB tape described in the aforementioned Araki patent, the different thermal coefficients of expansion associated with the different layers of material may induce a "peel-off" stress and cause the TAB tape to become cambered in an upward direction, as illustrated by the arrows in FIG. 2. The use of a protective solder resist layer 6 may also exacerbate the degree to which the TAB tape becomes cambered. Moreover, although the above described peeling-prevention slits described in the Araki patent may inhibit peel-off, such slits may also exacerbate the degree to which the TAB tape becomes cambered and this can lead to the formation of bonding and other related defects during subsequent processing.
Thus, notwithstanding the above described techniques for using TAB tapes, there continues to be a need for TAB tapes having less susceptibility to parasitic cambering caused by exposure of the TAB tapes to thermal and other processing steps.